GC4116 Datasheet, PDF (12/57 Pages) List of Unclassifed Manufacturers – MULTI-STANDARD QUAD DUC CHIP

GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
16 BITS
DATA
IN
CLOCKED AT 1/N RATE
CLOCKED AT FULL RATE
16 BITS
DATA
OUT
Figure 7. Five Stage CIC Interpolate by N Filter
3.3.3 The CIC Interpolate by N Filter
The CFIR output is interpolated by a factor of N in the
CIC¹ filter, where N is any integer between 8 and 1,448. The
filter is a 5 stage CIC filter. A block diagram of the CIC filter
is shown in Figure 7.The output of the CIC interpolation filter
is equal to the clock rate. The CIC filter has a gain equal to
N⁴ which must be removed by the “SCALE AND ROUND”
circuit shown in Figure 7. This circuit has a gain equal to
2^{-(3+SCALE+12*BIG_SHIFT)}, where SCALE ranges from 0 to 15
and BIG_SHIFT ranges from 0 to 2. The value chosen for
BIG_SHIFT must also satisfy: 2^{(12*BIG_SHIFT+18)} ≥ N⁴.
Overflows due to improper gain settings will go undetected if
this relationship is violated. This restriction means that N
must be less than 23 for BIG_SHIFT = 0, N must be less than
182 for BIG_SHIFT = 1, and N must be less than 1449 for
BIG_SHIFT = 2. Larger interpolation amounts can be
achieved by using the resampler to perform interpolation.
Larger interpolation amounts using the CIC can be
accomplished only by reducing the signal amplitude feeding
the CIC.
The CIC filter must be initialized when the chip is first
configured or whenever the interpolation value N or the shift
value BIG_SHIFT are changed. The CIC filter is initialized
using the flush controls described in Section 5.8. If the CIC is
disturbed during processing due to noise, radiation particles,
or due to changing N or BIG_SHIFT, then the CIC will
generate wideband white noise in the output. This property is
inherent in the mathematics of a CIC filter used for
interpolation. This instability can be prevented by using the
“auto flush” capability of the chip² (See
DISABLE_AUTO_FLUSH in control register 13). The auto
flush mode detects CIC instability and automatically
re-initializes the CIC. The auto flush mode requires that the
gain up to the output of the CIC filter is less than or equal to
unity.
1. Hogenhauer, Eugene V., An Economical Class of Digital Filters for
Decimation and Interpolation, IEEE transactions on Acoustics, Speech and
Signal Processing, April 1981.
2. The auto flush mode is a patented feature of the chip. Use of the auto flush
mode is highly recommended. CIC instability in cellular basestation chips
without the auto flush feature can cause full power white noise to be
transmitted on ALL frequencies, interfering with cell users in all nearby cells.
3.3.4 Wideband Input Mode
The overall interpolation factor of an up convert channel
is 4N. The minimum value of N is 8, which limits the
maximum input sample rate to be F_CK/32. If the clock rate is
100 MHz, then the maximum single channel input bandwidth
is between 2 and 3 MHz. Wider input bandwidths can be
handled by combining two channels into a single wideband
channel using the SplitIQ mode (SPLITIQ in register 1). In
the split IQ mode the complex input data is split between two
channels. One channel up converts the I-half and the other
channel up converts the Q-half. This allows the channels to
process data at twice the rate so the minimum CIC
interpolation is N=4 (rather than the previous N=8).
The input data is entered as two samples per CHREQ
cycle. The I-half inputs are packed into complex words (I0
with I1, for example) and input into the first channel. The
Q-half inputs are packed into complex words (Q0 with Q1, for
example) and input into the second channel. The channel
processing the imaginary data is programmed with a phase
offset of 90 degrees from the channel processing the real
channel (PHASE=0x4000).
In this mode, the chip can support two channels of 3.84
Mbaud UMTS signals.
NOTE: The resampler can not be used in the split IQ
mode since it cannot provide data in the two samples per
CHREQ format.
3.3.5 Complex Output Mode
The chip may be configured to generate complex rather
than real output. In this case the output is the I word followed
by the Q word at half the clock rate. The QFLG signal is used
to identify the Q half of the output. Complex output applies to
all channels on a chip. Likewise, if any chip in a sum path is
using complex output, then all chips in the sum path must do
so also. The CIC in the complex mode interpolates by N, but
only outputs every other sample. This means that the
effective CIC interpolation is N/2 in the complex output mode.
Note, however, that the CIC gain will still be a function of N,
not N/2.
© 1999−2001 GRAYCHIP,INC.
-7-
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice