GC4116 Datasheet, PDF (24/57 Pages) List of Unclassifed Manufacturers – MULTI-STANDARD QUAD DUC CHIP

GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
4.0 PACKAGING
H4 _SUMI21
H2 _SUMI20
H1 _SUMI19
G3 _SUMI18
H3 _SUMI17
G1 _SUMI16
G2 _SUMI15
F3 _SUMI14
F2 _SUMI13
E3 _SUMI12
E1 _SUMI11
E2 _SUMI10
D1 _SUMI9
D2 _SUMI8
C1 _SUMI7
C2 _SUMI6
B1 _SUMI5
B3
C3
SUMI4
SUMI3
A3 _SUMI2
B4 _SUMI1
C4 _SUMI0
(MSB)
SUMO21
SUMO20
SUMO19
SUMO18
SUMO17
SUMO16
SUMO15
SUMO14
SUMO13
SUMO12
SUMO11
SUMO10
SUMO9
SUMO8
SUMO7
SUMO6
SUMO5
SUMO4
SUMO3
SUMO2
SUMO1
SUMO0
QFLG
A4
B5
C5
A5
B6
B7
A7
C8
C7
A8
B8
C9
A9
B9
C10
A10
B10
C11
B11
A12
B12
A13
C13
M10
N10 ^SCKD
L14 ^SCKC
L11 ^SCKB
SCKA
M8
M9
N14
L12
SFSD
SFSC
SFSB
SFSA
H14
G13
E14
F12
SIND
SINC
SINB
SINA
GC4116 CHREQ ^P6
QUAD
DUC
CHIP
CHANNEL
I/O
M5 _SCSTART
SCCK1 ^P11
SCCK0 ^M12
SERIAL
SCFSD ^P7
CONTROLLER
I/O
SCFSC
SCFSB
N9
N12
SCFSA ^M11
N6 _RSTART
M14
M13
J13
K12
RCKD
RCKC
RCKB
RCKA
N7
P9
K13
L13
RFSD
RFSC
RFSB
RFSA
RESAMPLER
I/O
J11
G12
RIND
RINC
G11 _RINB
E13 _RINA
RREQ ^M6
ROCK1 ^P10
ROCK0 ^N11
ROFS1
ROFS0
P12
M7
ROUTD
ROUTC
ROUTB
H13
H11
F14
E12
ROUTA
L3 _{A4 (MSB)}
(MSB) C7 ^P5
L1 _A3
C6 ^N5
K2 _A2
C5 ^P4
K3 _A1
K1 _A0
M1
CONTROL
I/O
C4 ^M4
C3 ^N4
C2 ^P3
P2 ^RD
L2 ^WR
C1 ^M2
C0 ^M3
CE
N3 _WRMODE
J3
SIB
J1
SIA
J14 _CK
J12 _CK2X
SO
TMS
TCK
TDI
TDO
J2
C12
E11
D13
C14
0.36 mm
A2
D1 _{13 mm}
1.53 mm
A1 _A
0.5 mm
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A
B
C
D
E
GRAYCHIP
D
F
GC4116PB
G
H
QUAD DUC
J
MMMMMM
K
LLL YYWW
L
M
N
P
TOP VIEW
MMMMMM = Mask Code
LLL = Lot Number
YYWW = Date Code
L
P
1.0 mm
N
M
L
K
P
J
1.0 mm
H
G
F
E
B
D
C
0.53 mm
B
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
BOTTOM VIEW
DIMENSION
D (width body)
D1 (width cover)
P (ball pitch)
B (ball width)
L (overhang)
A (overall height)
A1 (ball height)
A2 (substrate thickness)
TYP
15 mm
13 mm
1.0 mm
0.53 mm
1.0 mm
1.53 mm
0.5 mm
0.36 mm
TOLERANCE
mm
mm
mm
mm
mm
mm
mm
mm
THERMAL GND BALLS: G7, G8, H7, H8
GND BALLS:
A6, D3, D12, E4, F4, F11, G14, K4, K11, N8
B2, B13, C6, D5, D9, D11, L5, L7, L8, L10, N2, N13
VCORE BALLS:
D4, D7, D14, F1, F13, G4, H12, J4, K14, P8
VPAD BALLS:
A2, A11, B14, D6, D8, D10, L4, L6, L9, N1, P13
NOTE: 0.01 to 0.1 µf DECOUPLING CAPACITORS SHOULD BE PLACED
AS CLOSE AS POSSIBLE TO EACH SIDE OF THE CHIP
Figure 15. 160 Pin Plastic Ball Grid Array (PBGA) Package
© 1999−2001 GRAYCHIP,INC.
- 19 -
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice