GC4116 Datasheet, PDF (42/57 Pages) List of Unclassifed Manufacturers – MULTI-STANDARD QUAD DUC CHIP

GC4116 MULTI-STANDARD QUAD DUC CHIP
DATA SHEET REV 1.0
I/O CONTROL PAGE 5 (continue)
ADDRESS 24: Output Enable Register, suggested default = 0x3f
BIT
0 LSB
1
2
3
4
5
6
7
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NAME
SUM_EN
RES_EN
REQ_EN
SC_EN
SO_EN
Unused
CHREQ_POL
RREQ_POL
DESCRIPTION
Enable sumout pins.
Enable resampler serial data out, resampler frame strobes, and resampler serial
clocks.
Enable resampler and channel request outputs.
Enable serial controller serial clocks and frame strobes.
Enable the sync output (SO) pin
Invert the channel request. This is useful when the request signal is used as a
frame strobe with some DSPs (such as Lucent 1620).
Invert the resampler request. This is useful when the request signal is used as a
frame strobe with some DSPs (such as Lucent 1620).
ADDRESS 25: Resampler Clock Divide Register, Must be set to 0x00
BIT
TYPE
NAME
DESCRIPTION
0-7
R/W
RES_CLK_DIV
Resampler clock division.
The resampler clock divider is not functional and must be set to zero.
© 1999−2001 GRAYCHIP,INC.
- 37 -
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice