STC5230 Datasheet, PDF (33/48 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

Default value: 0
0x3a, bits 4 ~ 0
2
3
4
5
6
7
8
9
10
31 ~ 11
STC5230
Synchronous Clock for SETS
Data Sheet
Bandwidth, Hz
24
12
5.9
2.9
1.5
.73
0.37
0.18
0.09
Reserved
T4_Auto_Active_Ref, 0x3b (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3b
Not used
Selection
Indicates the automatically selected active reference for T4. (Data valid in automatic mode only)
Bit 3 ~ Bit 0
0
1 ~ 12
13
14, 15
Selection
Freerun
Sync with Ref 1 ~ Ref 12
Holdover
Reserved
T4_Manual_Active_Ref, 0x3c (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3c
Not used
Selection
Selects the active reference for T4 in manual reference select mode. Default value: 0
Bit 3 ~ Bit 0
0
1 ~ 12
13
14
15
Selection
Freerun
Sync with Ref 1 ~ Ref 12
Holdover
Reserved
Lock on T0 output
T4_Device_Holdover_History, 0x3d (R)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3d
0x3e
0x3f
0x40
Bits 0 - 7 of 32 bit Device Holdover History
Bits 8 - 15 of 32 bit Device Holdover History
Bits 16 - 23 of 32 bit Device Holdover History
Bits 24 - 31 of 32 bit Device Holdover History
Preliminary
Data Sheet #: TM102 Page 33 of 48
Rev: P01
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: August 22, 2007