STC5230 Datasheet, PDF (20/48 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

STC5230
Synchronous Clock for SETS
Data Sheet
Note that the Load Mode pins should not both be power up or reset. The EEPROM interface is shown
high, as device damage may occur.
in Figure 10.
Functional Specification
In the ROM load mode, the configuration data is
loaded from the internal ROM, which is loaded with
the nominal manufacturer’s data. Data loading occurs
automatically on power up or after a reset.
Table 5: Load Mode Configuration Pins
Bus Load Process
Data loading via the bus mode is accomplished using
the Bus_Loader_Status (0x70), Bus_Loader_Data
(0x71), and Bus_Loader_Counter (0x72) registers.
User shall follow the procedure below:
LM1,LM0
0,0
0,1
1,0
1,1
Description
ROM load mode
Bus load mode
EEPROM load mode
Reserved - do not use
Table 6: Compatible EEPROMs
Manufacturer
ATMEL
Part Number
AT25128A
CS
EEPROM ^SCK
ATMEL ^SI
AT25128A _SO
EEP_CS
EEP_SCK
EEP_SI ^STC5230
EEP_SO
Both WP and HOLD
have to be tied high
Figure 10: EEPROM Configuration
In the bus load mode, the configuration data is loaded
from the SPI bus interface by the application, using
the device bus load register interface. Data is pro-
vided to the customer per an agreement with the
manufacturer. The load procedure is described in the
following section.
In the EEPROM load mode, an EEPROM loader will
load the configuration data from an optional external
EEPROM. Data will be provided by the manufacturer
per an agreement with the customer. The configura-
tion data may be read from or write to the external
EEPROM via the SPI bus interface.
When the EEPROM load mode is selected, data load-
ing occurs automatically immediately following a
/* --- *
The data array data[10496] contains the hardware/firmware
configuration data, starting from index 0.
* --- */
Procedure Bus_Load
begin
Label_Repeat:
- busy wait until bit “bus ready” in the
Bus_Loader_Status is equal to ‘1’;
- for i: = 0 to 10,495 step 1
begin
- write data[i] to register Bus_Loader_Data;
- busy wait until bit “bus ready” in register
Bus_Loader_Status is equal to ‘1’;
end
- if bit “load complete” in register Bus_Loader_Status is
equal to ‘0’
begin
/* loading failed */
- reset this device by asserting pin RESET;
- goto Label_Repeat;
end
- if bit “checksum status” in register
Bus_Loader_Status is equal to ‘0’
begin
/* loading failed */
- reset this device by asserting pin RESET;
- goto Label_Repeat;
end
/* Bus Loading Success */
end of procedure Bus Load
The device will assert “load complete” bit in register
Bus_Loader_Status after the application writes
10,496 bytes into register Bus_Loader_Data.
After the bit “load complete” is asserted, application
shall read and check the bit “checksum status” of reg-
ister Bus_Load_Status. “1” indicates the checksum
passed; “0” indicates the failure of loading. CRC-16
Preliminary
Data Sheet #: TM102 Page 20 of 48
Rev: P01
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: August 22, 2007