CN8223 Datasheet, PDF (39/161 Pages) Conexant Systems, Inc – ATM Transmitter/Receiver with UTOPIA Interface

CN8223
ATM Transmitter/Receiver with UTOPIA Interface
2.0 Functional Description
2.2 Line Framers
2.2.1.1 High-Speed
PECL Transmit Interface
For STS-3c, STM-1, or E4, the high-speed PECL interface is used. This mode is
used in any case where an external LIU/decoder is used (such as E4 and
STS-3c/STM-1 CMI decoding). If the mode is set to E4 or STS-3c/STM-1 in
CONFIG_1, then the outputs are taken from the “HS±” versions of the output
pins. The TCLKO (and TCLKO_HS±) phase shown can be inverted with the
Invert TX Clock Output control bit.
Table 2-3 lists the interface connections for the internal framing mode without
line encoding. Figure 2-4 illustrates the interface timing when the internal
B3ZS/HDB3 encoder is disabled.
Table 2-3. Internal Framing Unencoded Transmitter Connections (STS-3c, STM-1, E4)
Signal Name
Connect to CN8223 Pin
Transmit Clock Input (TXCKI)
Transmit Data (TXDATO)
Transmit Clock Output (TCLKO)
TXCKI_HS±
TXOUT_HS±
TCLKO_HS±
Figure 2-4. Internal Framer Transmitter Interface Timing Without Line Encoding
TCLKO
TXDATO
100046C
Conexant
2-5