CN8223 Datasheet, PDF (110/161 Pages) Conexant Systems, Inc – ATM Transmitter/Receiver with UTOPIA Interface

3.0 Registers
3.6 Interrupt Enable Control Registers
CN8223
ATM Transmitter/Receiver with UTOPIA Interface
3.6 Interrupt Enable Control Registers
Four registers enable interrupts to appear on the STAT_INT interrupt output pin (pin 64). The EN_LINE_INT
(0x2D), EN_EVENT_INT (0x2E), EN_OVFL_INT (0x2F), and EN_CELL_INT (0x30) enable interrupts based
on the same bit positions in the corresponding STATUS registers. For example, the EN_LINE_INT register
enables the interrupts reported in the LINE_STATUS register.
0x2D—EN_LINE_INT (Enable Line Interrupts)
The EN_LINE_INT register is located at address 0x2D and enables interrupts for the LINE_STATUS register
(0x38). Setting a bit in EN_LINE_INT enables each interrupt condition to appear on STAT_INT.
Bit
Ext. Framer
(57 octet)
Internal DS3
Internal G.751 E3
STS-1/STS-3c/
STM-1
15
0
0
14 One Second Count One Second Count
13 Invalid FEBE
Invalid FEBE
12 FEBE All-1s
11 PLCP FEBE Error
10 PLCP BIP Error
9 PLCP Frame Error
8 PLCP Yellow
7 PLCP LOF 2–3
6 PLCP LOF
5 PLCP OOF
4
x
3
x
2
x
1
x
0 LOS (Input)
FEBE All-1s
PLCP FEBE Error
PLCP BIP Error
PLCP Frame Error
PLCP Yellow/LOC
PLCP LOF 2–3
PLCP LOF
PLCP OOF/LOC
DS3 X bit Yellow
DS3 Idle Code
DS3 AIS
DS3 OOF
LOS (Input)
0
One Second Count
Invalid FEBE
FEBE All-1s
PLCP FEBE Error
PLCP BIP Error
PLCP Frame Error
PLCP Yellow
PLCP LOF 2–3
PLCP LOF
PLCP OOF
E3 A bit Yellow
x
E3 AIS
E3 OOF
LOS (Input)
Line FEBE Error
One Second Count
Signal Label
Mismatch
Path FERF Error
Path FEBE Error
Summary BIP Error
Line FERF
LOC
STS LOF 2–3
STS LOF
STS OOF
Path Yellow
Path AIS
Line AIS
STS LOP
LOS (Input)
NOTE(S):
Notes: 1. EN_LINE_INT and LINE_STATUS have definitions that change with line interface mode.
2. “x” means content should be disregarded.
G.832 E3/E4
0
One Second Count
Payload Type
Mismatch
MA FERF
MA FEBE
EM BIP Error
x
LOC
E3/E4 LOF 2–3
E3/E4 LOF
E3/E4 OOF
x
x
E3/E4 AIS
x
LOS (Input)
3-24
Conexant
100046C