EPF10K30E Datasheet, PDF (61/100 Pages) Altera Corporation – Embedded Programmable Logic Device

FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Table 30. External Bidirectional Timing Parameters Note (9)
Symbol
Parameter
Conditions
t_INSUBIDIR
t_INHBIDIR
t_INH
t_OUTCOBIDIR
t_XZBIDIR
t_ZXBIDIR
Setup time for bi-directional pins with global clock at same-row or same-
column LE register
Hold time for bidirectional pins with global clock at same-row or same-column
LE register
Hold time with global clock at IOE register
Clock-to-output delay for bidirectional pins with global clock at IOE register C1 = 35 pF
Synchronous IOE output buffer disable delay
C1 = 35 pF
Synchronous IOE output buffer enable delay, slow slew rate= off
C1 = 35 pF
Notes to tables:
(1) Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2) Operating conditions: VCCIO = 3.3 V ±10% for commercial or industrial use.
(3) Operating conditions: VCCIO = 2.5 V ±5% for commercial or industrial use in EPF10K30E, EPF10K50S,
EPF10K100E, EPF10K130E, and EPF10K200S devices.
(4) Operating conditions: VCCIO = 3.3 V.
(5) Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered.
(6) EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7) These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
(8) Contact Altera Applications for test circuit specifications and test conditions.
(9) This timing parameter is sample-tested only.
(10) This parameter is measured with the measurement and test conditions, including load, specified in the PCI Local
Bus Specification, revision 2.2.
Altera Corporation
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