EPF10K30E Datasheet, PDF (39/100 Pages) Altera Corporation – Embedded Programmable Logic Device

FLEX 10KE Embedded Programmable Logic Devices Data Sheet
ClockLock & ClockBoost Timing Parameters
For the ClockLock and ClockBoost circuitry to function properly, the
incoming clock must meet certain requirements. If these specifications are
not met, the circuitry may not lock onto the incoming clock, which
generates an erroneous clock within the device. The clock generated by
the ClockLock and ClockBoost circuitry must also meet certain
specifications. If the incoming clock meets these requirements during
configuration, the ClockLock and ClockBoost circuitry will lock onto the
clock during configuration. The circuit will be ready for use immediately
after configuration. Figure 19 shows the incoming and generated clock
specifications.
Figure 19. Specifications for Incoming & Generated Clocks
The t_I parameter refers to the nominal input clock period; the t_O parameter refers to the
nominal output clock period.
tCLK1
tINDUTY
tI ± fCLKDEV
Input
Clock
tR t_F
tOUTDUTY
tI
tI ± tINCLKSTB
ClockLock-
Generated
Clock
tO
tO + tJITTER tO – tJITTER
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