EPF10K30E Datasheet, PDF (29/100 Pages) Altera Corporation – Embedded Programmable Logic Device

FLEX 10KE Embedded Programmable Logic Devices Data Sheet
For improved routing, the row interconnect consists of a combination of
full-length and half-length channels. The full-length channels connect to
all LABs in a row; the half-length channels connect to the LABs in half of
the row. The EAB can be driven by the half-length channels in the left half
of the row and by the full-length channels. The EAB drives out to the full-
length channels. In addition to providing a predictable, row-wide
interconnect, this architecture provides increased routing resources. Two
neighboring LABs can be connected using a half-row channel, thereby
saving the other half of the channel for the other half of the row.
Table 7 summarizes the FastTrack Interconnect routing structure
resources available in each FLEX 10KE device.
Table 7. FLEX 10KE FastTrack Interconnect Resources
Device
Rows
EPF10K30E
6
EPF10K50E
10
EPF10K50S
EPF10K100E
12
EPF10K130E
16
EPF10K200E
24
EPF10K200S
Channels per
Row
216
216
Columns
36
36
312
52
312
52
312
52
Channels per
Column
24
24
24
32
48
In addition to general-purpose I/O pins, FLEX 10KE devices have six
dedicated input pins that provide low-skew signal distribution across the
device. These six inputs can be used for global clock, clear, preset, and
peripheral output enable and clock enable control signals. These signals
are available as control signals for all LABs and IOEs in the device. The
dedicated inputs can also be used as general-purpose data inputs because
they can feed the local interconnect of each LAB in the device.
Figure 14 shows the interconnection of adjacent LABs and EABs, with
row, column, and local interconnects, as well as the associated cascade
and carry chains. Each LAB is labeled according to its location: a letter
represents the row and a number represents the column. For example,
LAB B3 is in row B, column 3.
Altera Corporation
29