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EPF10K30E Datasheet, PDF (30/100 Pages) Altera Corporation – Embedded Programmable Logic Device
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Figure 14. FLEX 10KE Interconnect Resources
I/O Element (IOE)
IOE IOE
IOE IOE
IOE IOE
See Figure 17
for details.
IOE
IOE
Row
Interconnect
LAB
A1
LAB
A2
LAB
A3
Column
Interconnect
IOE
IOE
LAB
LAB
LAB
B1
B2
B3
IOE
IOE
See Figure 16
for details.
LAB A5
LAB A4
IOE
IOE
Cascade &
Carry Chains
LAB B5
LAB B4
IOE IOE
IOE IOE
IOE IOE
I/O Element
An IOE contains a bidirectional I/O buffer and a register that can be used
either as an input register for external data that requires a fast setup time,
or as an output register for data that requires fast clock-to-output
performance. In some cases, using an LE register for an input register will
result in a faster setup time than using an IOE register. IOEs can be used
as input, output, or bidirectional pins. For bidirectional registered I/O
implementation, the output register should be in the IOE, and the data
input and output enable registers should be LE registers placed adjacent
to the bidirectional pin. The Altera Compiler uses the programmable
inversion option to invert signals from the row and column interconnect
automatically where appropriate. Figure 15 shows the bidirectional I/O
registers.
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Altera Corporation