EPF10K30E Datasheet, PDF (25/100 Pages) Altera Corporation – Embedded Programmable Logic Device

FLEX 10KE Embedded Programmable Logic Devices Data Sheet
In addition to the six clear and preset modes, FLEX 10KE devices provide
a chip-wide reset pin that can reset all registers in the device. Use of this
feature is set during design entry. In any of the clear and preset modes, the
chip-wide reset overrides all other signals. Registers with asynchronous
presets may be preset when the chip-wide reset is asserted. Inversion can
be used to implement the asynchronous preset. Figure 12 shows examples
of how to setup the preset and clear inputs for the desired functionality.
Figure 12. FLEX 10KE LE Clear & Preset Modes
Asynchronous Clear
Asynchronous Preset
labctrl1 or
labctrl2
Chip-Wide Reset
VCC
PRN
DQ
CLRN
Chip-Wide Reset
labctrl1 or
labctrl2
PRN
DQ
CLRN
VCC
Asynchronous Preset & Clear
labctrl1
PRN
DQ
labctrl2
Chip-Wide Reset
CLRN
Asynchronous Load with Clear
labctrl1
(Asynchronous
Load)
data3
(Data)
NOT
labctrl2
(Clear)
Chip-Wide Reset
NOT
Asynchronous Load with Preset
labctrl1
(Asynchronous
Load)
labctrl2
(Preset)
NOT
data3
(Data)
NOT
PRN
DQ
Asynchronous Load without Clear or Preset
labctrl1
(Asynchronous
Load)
data3
(Data)
NOT
PRN
DQ
CLRN
NOT
CLRN
Chip-Wide Reset
PRN
DQ
CLRN
Chip-Wide Reset
Altera Corporation
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