AK8854VQ Datasheet, PDF (76/95 Pages) Asahi Kasei Microsystems – Multi-Format Digital Video Decoder

[AK8854VQ]
Control 1 Register (R/W) [Sub Address 0x0C], for the following function setting
Sub Address 0x0C
bit 7
bit 6
CLKMODE1 CLKMODE0
Default Value
0
0
bit 5
INTPOL1
0
bit 4
INTPOL0
0
bit 3
bit 2
UVFILSEL1 UVFILSEL0
0
0
Default Value: 0x00
bit 1
bit 0
YCSEP1 YCSEP0
0
0
Control 1 Register Definition
Bit
Register
Name
bit 0 YCSEP0
~
~
bit 1 YCSEP1
YC Separation Control
bit 2 UVFILSEL0
~
~
UV Filter Select
bit 3 UVFILSEL1
bit 4 INTPOL0
~
~
bit 5 INTPOL1
Interpolator Mode Select
bit 6 CLKMODE0
~
~
Clock Mode Select
bit 7 CLKMODE1
R/W Definition
Y/C separation setting
[YCSEP1: YCSEP0]
R/W ^{[00]: Adaptive Y/C separation}
[01]: 1-dimensional Y/C separation
[10]: 2-dimensional Y/C separation
[11]: Reserved
UV filter setting
[UVFILSEL1: UVFILSEL0]
(CVBS or S-video input)
[00]: Wide 1
R/W
[01]: Narrow 1
(YPbPr or RGB input)
[00]: Middle 1
[01]: Middle 2
[10]: Wide 2
[11]: Narrow 2
Pixel interpolator setting
[INTPOL1: INTPOL0]
R/W
[00]: Auto
[01]: ON
[10]: OFF
[11]: Reserved
Clock mode setting
[CLKMODE1: CLKMODE0]
R/W ^{[00]: Automatic transition mode}
[01]: Line-locked clock mode
[10]: Frame-locked clock mode
[11]: Fixed-clock mode
MS0973-E-01
76
2008/07