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AK8854VQ Datasheet, PDF (13/95 Pages) Asahi Kasei Microsystems – Multi-Format Digital Video Decoder
[AK8854VQ]
4.3 DC characteristics
Where no specific condition is indicated in the following table, the supply voltage range
is the same as that shown for the recommended operating conditions in 4-2 above.
Parameter
Symbol
Min
Typ
Max
Units Condition
Digital P2 input high
voltage
0.8PVDD2
–
VIH
0.7PVDD2
–
–
V
Case 1a
–
V
Case 2b
Digital P2 input low
voltage
VIL
–
–
–
0.2PVDD2
V
–
0.3PVDD2
V
Case 1a
Case 2b
Digital D input high voltage VDIH 0.8DVDD
–
–
V
–
Digital D input low voltage VDIL
–
–
0.8PVDD1
–
Digital input high voltage VIH
0.7PVDD1
–
–
–
Digital input low voltage
VIL
–
–
0.2DVDD
V
–
V
–
V
0.2PVDD1
V
0.3PVDD1
V
–
Case 1a
Case 2b
Case 1a
Case 2b
Digital input leak current
IL
–
–
±10
uA
–
Digital P1 output high
voltage
VOH 0.7PVDD1
–
–
V IOH = −600uA
Digital P1 output low
voltage
VOL
–
–
0.3PVDD1
V
IOL = 1mA
Digital P2 output high
voltage
VOH 0.7PVDD2
–
–
V IOH = −600uA
Digital P2 output low
voltage
VOL
–
–
0.3PVDD2
V
IOL = 1mA
I2C (SDA)L output
VOLC
–
IOLC = 3mA
–
0.4
V PVDD2≥2.0V
0.2PVDD2
PVDD2<2.0V
aDVDD = 1.70V~2.00V, 1.70V≤PVDD1<2.70V, 1.70V≤PVDD2<2.70V, Ta: −40~85˚C
bDVDD = 1.70V~2.00V, 2.70V≤PVDD1≤3.60V, 2.70V≤PVDD2≤3.60V, Ta: −40~85˚C
Definition of above input/output terms
Digital P2 input: Collective term for SDA, SCL, SELA, OE, PDN, RSTN pin inputs.
Digital D input: Collective term for CLKMD, TEST0, TEST1 pin inputs.
Digital input: Collective term for H_CSYNC, VSYNC pin inputs.
Digital P1 output: Collective term for DTCLK, DATA[7:0], HD, VD_F, DVALID_F pin outputs.
Digital P2 output: Collective term for NSIG pin outputs.
SDA pin output: Not termed digital pin output unless otherwise specifically stated.
MS0973-E-01
13
2008/07