AK8854VQ Datasheet, PDF (69/95 Pages) Asahi Kasei Microsystems – Multi-Format Digital Video Decoder

[AK8854VQ]
NDMODE Register (R/W) [Sub Address 0x06], for limiting auto input video signal detection candidates
Sub Address 0x06
bit 7
bit 6
ND625L
ND525L
Default Value
0
0
bit 5
NDPAL60
0
bit 4
bit 3
NDNTSC443 Reserved
0
0
Default Value: 0x00
bit 2
bit 1
bit 0
NDSECAM NDPALNC NDPALM
0
0
0
NDMODE Register Definition
Bit
Register
Name
bit 0 NDPALM
No Detect PAL-M bit
R/W Definition
R/W
[0]: PAL-M candidate
[1]: PAL-M non-candidate
bit 1 NDPALNC No Detect PAL-Nc bit
R/W
[0]: PAL-Nc candidate
[1]: PAL-Nc non-candidate
bit 2 NDSECAM No Detect SECAM bit
R/W
[0]: SECAM candidate
[1]: SECAM non-candidate
bit 3 Reserved
Reserved
R/W Reserved
bit 4 NDNTSC443 No Detect NTSC-4.43 bit
bit 5 NDPAL60
No Detect PAL-60 bit
bit 6 ND525L
No Detect 525Line bit
R/W
[0]: NTSC-4.43 candidate
[1]: NTSC-4.43 non-candidate
R/W
[0]: PAL-60 candidate
[1]: PAL-60 non-candidate
R/W
[0]: 525 line candidate
[1]: 525 line non-candidate
bit 7 ND625L
No Detect 625Line bit
R/W
[0]: 625 line candidate
[1]: 625 line non-candidate
In making the above register settings, the following restrictions apply,
1. Setting both NDNTSC443(bit 4) and NDPAL60(bit 5) to [1] (High) is prohibited.
2. Setting both ND525L(bit 6) and ND625L(bit 7) to [1] (High) is prohibited.
3. To limit candidate formats, it is necessary to have the auto detection mode OFF while first
setting the register to non-limited signal status and next the NDMODE settings, and then setting
the auto detection mode to ON.
MS0973-E-01
69
2008/07