AK8854VQ Datasheet, PDF (45/95 Pages) Asahi Kasei Microsystems – Multi-Format Digital Video Decoder

[AK8854VQ]
7.8 Auto Gain Control_AGC
The AGC of the AK8854 measures the size of the input sync signal (i.e., the difference between the sync
tip and pedestal levels), and adjusts the PGA value to bring the sync signal level to 286^a or 300^b mV.
The AGC function amplifies the input signal to the appropriate size and enables input to the AD
converter. The AGC function in the AK8854 is adaptive, and thus includes peak AGC as well as sync
AGC. Peak AGC is effective for input signals in which the sync signal level is appropriate and only the
active video signal is large.
a _{NTSC-M, J; NTSC-4.43; PAL-M}
b _{PAL-B, D, G, H, I, N; PAL-Nc; PAL-60; SECAM}
In YPbPr or RGB mode, the Pb, Pr, B and R signals are adjust by Y sync or G sync.
The base sync level is CSSL setting value at YpbPr or RGB input.
However, AGC function must not be set when sync signal is H/VSYNC or CSYNC at RGB input.
AGCT[1:0]-bits: Settings for AGC time constant
AGCT[1:0]-bits
Time constant
Notes
[00]
Disable
AGC OFF, PGA register enabled.
[01]
Fast
T= 1Field
[10]
Middle
T= 7Fields
[11]
Slow
T= 29Fields
T is the time constant.
Manual setting of the PGA register is possible only if AGC is disabled.
AGCT must be set “disable” when sync signal is H/VSYNC or CSYNC at RGB input.
AGCC-bit: Settings for AGC non-sensing range
AGCC[1:0]-bits Non-sensing range
[00]
±2LSB
[01]
±3LSB
[10]
±4LSB
[11]
None
Notes
–
–
–
–
AGCFRZ-bit: Settings for freezing AGC function
AGCFRZ-bit
AGC status
Notes
[0]
Non-frozen
–
[1]
Frozen
–
Note. The gain value at the time of freezing is maintained during the frozen state, and it is then
possible to read out the gain value via the PGA1,2 Control Register.
AGCTL-bit: Settings for selection of quick or slow transition between peak and sync AGC
AGCTL-bit
AGC transition
Notes
[0]
Quick
–
[1]
Slow
–
MS0973-E-01
45
2008/07