AK8854VQ Datasheet, PDF (63/95 Pages) Asahi Kasei Microsystems – Multi-Format Digital Video Decoder

[AK8854VQ]
10. Register settings overview
Input Channel Select Register (R/W) [Sub Address 0x00], for input signal selection
Sub Address 0x00
bit 7
bit 6
AINSEL7
AINSEL6
Default Value
0
0
bit 5
AINSEL5
0
bit 4
AINSEL4
0
bit 3
AINSEL3
bit 2
AINSEL2
Default Value: 0x00
bit 1
bit 0
AINSEL1 AINSEL0
0
0
0
0
Input Channel Select Register Definition
Bit
Register
Name
bit 0 AINSEL0
~
~
Analog Input Select
bit 7 AINSEL7
R / W Definition
R/W
Input video signal selection:
[00000000]: AIN1 (CVBS)
[00000001]: AIN2 (CVBS)
[00000010]: AIN3(CVBS)
[00000011]: AIN4 (CVBS)
[00000100]: AIN5 (CVBS)
[00000101]: AIN6 (CVBS)
[00001101]: AIN6(Y) / AIN7(C)
[00011100]: AIN5(Y) / AIN8(C)
[00100011]: AIN4(Y) / AIN9(C)
[01100010]: AIN3(Y) / AIN10(C)
[00101101]: AIN6(Y) / AIN7(Pb) / AIN9(Pr)
[10101101]: AIN6(G) / AIN7(R) / AIN9(B)
[01111100]: AIN5(Y) / AIN8(Pb) / AIN10(Pr)
[11111100]: AIN5 (G)/ AIN8(R) / AIN10(B)
MS0973-E-01
63
2008/07