AK4753 Datasheet, PDF (74/85 Pages) Asahi Kasei Microsystems – 2-in, 4-out CODEC with DSP Functions

[AK4753]
SYSTEM DESIGN
Figure 75 and Figure 76 shows the system connection diagram. An evaluation board (AKD4753) is available for fast
evaluation as well as suggestions for peripheral circuitry.
Digital In
μP
Digital Ground
Analog Ground
Power Supply
3.0 ∼ 3.6V
10u
10
10u
“L”: Normal Operation
“H”: DSP Bypass mode
X’tal
C
C
0.1u
2.2u
25 ^NC
26 ^XTO
27 ^XTI
28 ^DVDD
29 ^VSS2
30 ^REG
31 ^BYPASS
32 ^NC
AK4753
Top View
EESDA ₁₆
EXTEE ₁₅
PDN ₁₄
FLT ₁₃
TEST ₁₂
SAIN1 ₁₁
SAIN2 ₁₀
AINR ₉
Rp Cp
Speaker
2.2u
“L”: Mute
“H”: Normal Operation
External
Speaker-Amp
0.1u
AVDD
Potentiometer
(Bass Gain Control)
AVDD
Potentiometer
(Vol Control)
Analog In
Notes:
- VSS1 and VSS2 of the AK4753 must be distributed separately from the ground of external controllers.
- All digital input pins must not be left floating.
- When the EXT mode is used (PMPLL bit = “0”), FLT pin can be open.
- When the PLL mode is used (PMPLL bit = “1”), “Cp” and “Rp” must be set according to Table 5.
- “C” value is dependent on the crystal.
- When the AK4753 is used in master mode, LRCK and BICK pins are floating before M/S bit is changed to
“1”. Therefore, around 100kΩ pull-up/down resistor must be connected to LRCK and BICK pins of the
AK4753.
- 0.1μF capacitors at power supply pins should be ceramic capacitors. Other capacitors do not have specific
types.
Figure 75. System Connection Diagram (Serial Control Mode: EXTEE pin = “L”)
MS1311-E-00
- 74 -
2011/07