AK4753 Datasheet, PDF (1/85 Pages) Asahi Kasei Microsystems – 2-in, 4-out CODEC with DSP Functions

[AK4753]
AK4753
2-in, 4-out CODEC with DSP Functions
GENERAL DESCRIPTION
The AK4753 is a two input, four output audio CODEC with integrated digital signal processing. The
outputs can be configured either as single-ended or differential. An internal PLL allows the chip to run in
master clock free mode. The digital signal processing block includes an ALC/limiter, 5 configurable
biquads for EQ, volume control, and 4^th-order filters for each output channel to enable a variety of
configurations. Wide dynamic range is achieved with 96dB S/N for the ADC, and 103dB S/N for the
DAC’s. A two-input 8-bit SAR ADC is integrated for processing of external potentiometers, supporting
volume and bass control functions. A small external EEP-ROM is used to store the coefficient values for
the DSP blocks. The AK4753 is controlled by an I²C control interface.
FEATURES
† Digital audio input interface
− Data format: MSB-first, two’s complement
− 16, 20, or 24-bits, I2S, MSB justified, LSB justified, or DSP mode
− Audio sampling rates: 8kHz to 48kHz
† Analog audio input
− Single-ended input stereo 24-bit audio ADC
− S/N: 96dB S/(N+D): 85dB
− Digital high-pass filter for DC-offset correction
† Analog audio output
− Four-channel 24-bit audio DAC
− Single-ended or differential output
− S/N: 103dB S/(N+D): 88dB
† 8-bit SAR ADC with two input selector
† Digital mixer for balancing inputs
† Digital signal processing block: DSP1, DSP2 independently
− Configurable ALC / limiter function
− Volume control: 0dB to -127dB, 0.5dB steps, mute
− Pre-gain setting: 0dB, +6dB, +12dB, +18dB
− Post-gain setting: 0dB, +3.5dB, +6dB, +8dB
− Five programmable biquads for EQ
− 4^th-order high-pass filter or low-pass filter
† Integrated PLL for master clock-free operation
† PLL
− Input frequency: 24.576MHz, 24MHz, 22.5792MHz, 12.288MHz, 12MHz, and
11.2896MHz (XTI/MCKI pin)
1fs (LRCK pin), 32fs or 64fs (BICK pin)
− Input level: CMOS or AC-coupled (XTI/MCKI pin)
† Master clock input: 256fs, 512fs, 1024fs
† μP I/F: I²C bus-slave (400kHz Fast-mode)
† EEP-ROM control I/F: I²C bus-master (400kHz Fast-mode)
† Ta = -30 ~ +85°C
† Power supply:
Analog (AVDD): 3.0 ~ 3.6V (typ 3.3V)
Digital (DVDD: 3.0 ~ 3.6V (typ 3.3V)
† Package: 32 pin QFN (4 x 4 mm, 0.4mm pitch)
MS1311-E-00
-1-
2011/07