AK4753 Datasheet, PDF (55/85 Pages) Asahi Kasei Microsystems – 2-in, 4-out CODEC with DSP Functions

[AK4753]
SDA
SCL
S
start condition
P
stop condition
Figure 72. Start Condition and Stop Condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 73. Acknowledge (I²C Bus)
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 74. Bit Transfer (I²C Bus)
MS1311-E-00
- 55 -
2011/07