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AK4753 Datasheet, PDF (24/85 Pages) Asahi Kasei Microsystems – 2-in, 4-out CODEC with DSP Functions | |||
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[AK4753]
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be improved by using higher frequency of the master clock. The S/N of the DAC output
through LOUT1/ROUT1 and LOUT2/ROUT2 pins is shown in Table 10.
MCKI
S/N
(fs=8kHz, 20kHzLPF + A-weighted)
256fs
87 dB
512fs
96 dB
1024fs
97 dB
Table 10. Relationship between MCKI and S/N of LOUT1/ROUT1 and LOUT2/ROUT2 pins (SPC1-0 bits = â00â)
AK4753
MCKI
BICK
LRCK
256fs, 512fs or 1024fs
DSP
MCLK
⥠32fs
BCLK
1fs
LRCK
SDTI
SDTO
Figure 24. EXT Slave Mode
â EXT Master Mode (PMPLL bit = â0â, M/S bit = â1â)
The AK4753 becomes EXT Master Mode by setting PMPLL bit = â0â or the M/S bit = â1â. Master clock is input from
the XTI/MCKI pin or the crystal oscillator circuit is used, the internal PLL circuit is not operated. The clock required to
operate the AK4753 is XTI/MCKI (256fs, 512fs or 1024fs). The input frequency of XTI/MCKI is selected by FS1-0
bits (Table 11).
Mode
FS3-2 bits
FS1 bit
FS0 bit
XTI/MCKI
Input Frequency
Sampling Frequency
Range
0
x
0
0
256fs
7.35kHz â¼ 48kHz (default)
1
x
0
1
1024fs
7.35kHz â¼ 13kHz
2
x
1
0
512fs
7.35kHz â¼ 26kHz
3
x
1
1
512fs
7.35kHz â¼ 26kHz
Table 11. XTI/MCKI Frequency at EXT Master Mode (PMPLL bit = â0â, M/S bit = â1â) (x: Donât care)
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be improved by using higher frequency of the master clock. The S/N of the DAC output
through LOUT1/ROUT1 and LOUT2/ROUT2 pins is shown in Table 12.
XTI/MCKI
S/N
(fs=8kHz, 20kHzLPF + A-weighted)
256fs
87 dB
512fs
96 dB
1024fs
97 dB
Table 12. Relationship between XTI/MCKI and S/N of LOUT1/ROUT1 and LOUT2/ROUT2 pins (SPC1-0 bits = â00â)
MS1311-E-00
- 24 -
2011/07
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