AK4753 Datasheet, PDF (45/85 Pages) Asahi Kasei Microsystems – 2-in, 4-out CODEC with DSP Functions

[AK4753]
2. Limiter Recovery Operation
A limiter recovery operation waits for the WTM2-0 bits (Table 34) to be set after completing a limiter operation. If the
input signal does not exceed “recovery waiting counter reset level” (Table 31) during the wait time, the limiter recovery
operation is completed. The VOL values (Lch and Rch) are automatically incremented by RGAIN1-0 bits (Table 35) up
to the set reference level (Table 36) with zero crossing detection which timeout period is set by ZTM1-0 bits (Table 33).
Then the VOL’s are set to the same value for both channels. This limiter recovery operation is executed at a period set
by WTM2-0 bits. When zero cross is detected at both channels during the wait period set by WTM2-0 bits, a limiter
recovery operation waits until WTM2-0 period and the next recovery operation is completed. If ZTM1-0 is longer than
WTM2-0 and no zero crossing occurs, a limiter recovery operation is made at a period set by ZTM1-0 bits.
For example, when the current VOL value is 30H and RGAIN1-0 bits are set to “01” (2 steps), VOL is changed to 32H
by the limiter operation and then the input signal level is gained by 0.75dB (=0.375dB x 2). When the VOL value
exceeds the reference level (REF7-0 bits), the VOL values are not increased.
When
“Limiter recovery waiting counter reset level (LMTH1-0) ≤ Output Signal < Limiter detection level (LMTH1-0)”
during a limiter recovery operation, the waiting timer of limiter recovery operation is reset.
When
“Limiter recovery waiting counter reset level (LMTH1-0) > Output Signal”,
the waiting timer of limiter recovery operation starts.
The limiter operation corresponds to the impulse noise. When the impulse noise is input, limiter recovery operation is
faster than a normal recovery operation (Fast Recovery Operation). When large noise is input to microphone
instantaneously, quality of small signal level in the large noise can be improved by this fast recovery operation. The
speed of fast recovery operation is set by RFST1-0 bits (Table 37).
WTM2
bit
0
0
0
0
1
1
1
1
WTM1
bit
0
0
1
1
0
0
1
1
WTM0
Recovery Operation Waiting Period
bit
8kHz
16kHz
44.1kHz
0
128/fs
16ms
8ms
2.9ms
1
256/fs
32ms
16ms
5.8ms
0
512/fs
64ms
32ms
11.6ms
1
1024/fs
128ms
64ms
23.2ms
0
2048/fs
256ms
128ms
46.4ms
1
4096/fs
512ms
256ms
92.9ms
0
8192/fs
1024ms
512ms
185.8ms
1
16384/fs
2048ms
1024ms
371.5ms
Table 34. Recovery Operation Waiting Period
RGAIN1 bit
0
0
1
1
RGAIN0 bit
GAIN STEP
0
1 step
0.375dB
1
2 step
0.750dB
0
3 step
1.125dB
1
4 step
1.500dB
Table 35. Recovery GAIN Step
(default)
(default)
MS1311-E-00
- 45 -
2011/07