AK4537 Datasheet, PDF (73/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
Revision History
Date (YY/MM/DD) Revision Reason
03/02/03
00
First Edition
03/03/24
01
Spec change:
Error correct:
03/05/23
02
Error correct:
Page
33
5-6
22
27/21
56
59
59
21
Contents
Headphone amp oscillation prevention circuit
0.22µF+10Ω → 0.22µF±20% capacitor and
10Ω±20% resistor
Pin/Function
NC pin: “No internal bonding.” → “This pin
should be left floating.”
System Clock
The following caution is also added to EXT
mode:
“If PS1-0 bits are changed before LRCK is
input, MCKO is not output. PS1-0 bits should
be changed after LRCK is input in slave mode.”
MIC-ALC Operation (ALC1 Recovery Operation)
“If both Lch and Rch input signals are lower
than the “ALC1 Recovery Waiting Counter
Reset Level”, the ALC1 recovery operation
starts.”
→ “If Lch or Rch input signals are lower than
the “ALC1 Recovery Waiting Counter Reset
Level”, the ALC1 recovery operation starts.”
Register Definitions
ATTS2-0 bit: “0(OFF), 1(ON)” is removed.
Analog Input
“centered around the internal common voltage
(approx. AVDD/2)”
→ “centered around the internal common
voltage (0.45 x AVDD)”
Analog Output
“Mono output from the MOUT2 pin and Mono
Line Output from the MOUT+ and MOUT-
pins are centered at AVDD/2.”
→ “Mono output from the MOUT2 pin and
Mono Line Output from the MOUT+ and
MOUT- pins are centered at 0.45 x AVDD.”
System Clock
“If the sampling frequency is changed and the
PLL goes to unlock state when the DAC is
operated(PMDAC bit=“1”), the DAC data
should be soft-muted or “0”. In case of the
ADC(PMADL bit = “1” or PMADR bit = “1”),
the ADC data acquired during the frequency
change may be erroneous and therefore should
not be used.” is deleted.
MS0202-E-04
- 73 -
2005/04