AK4537 Datasheet, PDF (68/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
„ Speaker-amp Output
FS2-0 bits
(Addr:05H, D7-5)
000
(1)
ALC2 bit
0
(Addr:09H, D6
(2)
ATTL7-0 bits
(Addr:0CH 0DH, D7-0)
PMDAC bit
(Addr:01H, D0)
PMSPK bit
(Addr:01H, D3)
0000000
(3)
(4)
SPPS bit
(Addr:05H, D0)
SPP pin
Hi-Z
XXX
X
XXXXXXX
(7)
(5)
(6)
Normal Output
Hi-Z
SPN pin
Hi-Z
HVDD/2 Normal Output HVDD/2 Hi-Z
E xa m p le :
X ’tal a n d P L L a re use d.
S a m p li n g F r e q u e n c y : 4 8 k H z
D A T T C b it = “ 1 ”( d e f a u lt )
D igita l A tte nu ato r Le v e l : 0 dB
A LC 1 : D isa ble
A LC 2 : D isa ble
(1 ) A d d r:0 5 H , D a ta 6 0 H
(2 ) A d d r:0 9 H , D a ta 0 0 H
(3 ) A d d r:0 C H , D a ta 0 0 H
(4 ) A d d r:0 1 H , D a ta 6 9 H
(5 ) A d d r:0 5 H , D a ta 6 1 H
P la yb a c k
(6 ) A d d r:0 5 H , D a ta 6 0 H
(7 ) A d d r:0 1 H , D a ta 6 0 H
Figure 56. Speaker-Amp Output Sequence
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS2-0 bits) if PLL mode is used.
(2) Set up the ALC2 Enable/Disable(ALC2 bit)
(3) Set up the digital volume(Addr : 0CH and 0DH)
At DATTC bit = “1”(default), ATTL7-0 bits of Address 0CH control both Lch and Rch attenuation level.
(4) Power up of DAC and Speaker-amp : PMDAC bit = PMSPK bit = “0” → “1”
The initializing time of Speaker-amp is 2048/fs=46.4ms@fs=44.1kHz.
(5) Exit the power-save-mode of Speaker-amp : SPPS bit = “0” → “1”
(6) Enter the power-save-mode of Speaker-amp : SPPS bit = “1” → “0”
(7) Power down DAC and Speaker-amp : PMDAC bit = PMSPK bit = “1” → “0”
MS0202-E-04
- 68 -
2005/04