AK4537 Datasheet, PDF (70/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
3. External clock mode
M C K P D bit
(A ddr:01H , D 7)
E xternal M C LK
Input
Exam ple :
(1) Addr:01H , D ata:80H
(2) Stop external clock
Figure 59. Stop of Clock Sequence(3)
<Example>
(1) Pull down the XTI pin : MCKPD = “0” → “1”
When the external MCLK becomes Hi-Z or the external MCLK is input by AC couple, MCKI pin should be
pulled down.
(2) Stop an external MCLK
„ Power down
Power down VCOM(PMVCM= “1” → “0”) after all blocks except VCOM are powered down and MCLK stops. The
AK4537 is also powered-down by PDN pin = “L”. When PDN pin = “L”, the registers are initialized.
MS0202-E-04
- 70 -
2005/04