AK4537 Datasheet, PDF (53/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
Addr
08H
Register Name
Timer Select
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
ROTM ZTM1 ZTM0 WTM1 WTM0 LTM1 LTM0
RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
LTM1-0: ALC1 limiter operation period at zero crossing disable (ZELM bit = “1”) (see Table 25)
The IPGA value is changed immediately. When the IPGA value is changed continuously, the change is done
by the period specified by the LTM1-0 bits. Default is “00” (0.5/fs).
LTM1 LTM0
ALC1 Limiter Operation Period
8kHz
16kHz
44.1kHz
0
0
0.5/fs
63µs
31µs
11µs
Default
0
1
1/fs
125µs
63µs
23µs
1
0
2/fs
250µs
125µs
45µs
1
1
4/fs
500µs
250µs
91µs
Table 25. ALC1 Limiter Operation Period at zero crossing disable (ZELM bit = “1”)
WTM1-0: ALC1 Recovery Waiting Period (see Table 26)
A period of recovery operation when any limiter operation does not occur during the ALC1 operation.
Default is “00” (128/fs).
WTM1
0
0
1
1
WTM0
ALC1 Recovery Operation Waiting Period
8kHz
16kHz
44.1kHz
0
128/fs
16ms
8ms
2.9ms
1
256/fs
32ms
16ms
5.8ms
0
512/fs
64ms
32ms
11.6ms
1
1024/fs
128ms
64ms
23.2ms
Table 26. ALC1 Recovery Operation Waiting Period
Default
ZTM1-0: Zero crossing timeout for the write operation by the µP, ALC1 recovery, and zero crossing enable (ZELM
bit = “0”) of the ALC1 operation. (see Table 27)
When the IPGA of each L/R channels perform zero crossing or timeout independently, the IPGA value is
changed by the µP WRITE operation, ALC1 recovery operation or ALC1 limiter operation (ZELM bit = “0”).
Default is “00” (128/fs).
ZTM1
0
0
1
1
ZTM0
0
1
0
1
Zero Crossing Timeout Period
8kHz
16kHz
44.1kHz
128/fs
16ms
8ms
2.9ms
256/fs
32ms
16ms
5.8ms
512/fs
64ms
32ms
11.6ms
1024/fs
128ms
64ms
23.2ms
Table 27. Zero Crossing Timeout Period
Default
ROTM: Period time for ALC2 Recovery operation
0: 2048/fs (Default)
1: 512/fs
MS0202-E-04
- 53 -
2005/04