AK4537 Datasheet, PDF (42/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
SDA
SCL
S
start condition
P
stop condition
Figure 42. START and STOP Conditions
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 43. Acknowledge on the I²C-Bus
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 44. Bit Transfer on the I²C-Bus
MS0202-E-04
- 42 -
2005/04