AK4537 Datasheet, PDF (34/76 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4537]
„ Speaker Output
The output signal from analog volume is converted into a mono signal [(L+R)/2] and this signal is input to the
Speaker-amp via the ALC2 circuit. This Speaker-amp is a mono BTL output. When DAC output signal is input to MIN
pin as system design example (Figure 47), Speaker-amp can output a maximum of 300mW@SPKG bit = “0” and ALC2
bit = “0” at 8Ω load when HVDD = 3.3V. When BEEP input is used for DAC output, maximum power becomes 400mW.
Figure 29 and Figure 30 indicates connection examples for 400mW output.
SPKG
ALC2
Po(max)
0
x
150mW Default
1
0
300mW
1
250mW
Table 20. SPK-Amp Maximum Output Power (x: Don’t care)
Speaker blocks (MOUT2, ALC2 and Speaker-amp) can be powered up/down by controlling the PMSPK bit. When the
PMSPK bit is “0”, the MOUT2, SPP and SPN pins are placed in a Hi-Z state.
When the SPPS bit is “0”, the Speaker-amp enters power-save-mode. In this mode, the SPP pin is placed in a Hi-Z state
and the SPN pin goes to HVDD/2 voltage. And then the Speaker output gradually changes to the HVDD/2 voltage and
this mode can reduce pop noise at power-up. When the AK4537 is powered down, pop noise can be also reduced by first
entering power-save-mode.
PMSPK bit
SPPS bit
SPP pin
Hi-Z
Hi-Z
SPN pin Hi-Z ^HVDD/2
HVDD/2
Hi-Z
Figure 28. Power-up/Power-down Timing for Speaker-amp
[Connection Example for 400mW output]
1) Using BEEPM pin
AK4537
20k
± 30%
SPK-Amp
SPP
MOUT2
0.047u _16k
45%AVDD
BEEPM
BPMSP
SPN
Figure 29. Connection example for 400mW output using BEEPM pin (SPKG bit = “1”)
MS0202-E-04
- 34 -
2005/04