Z8018008VSG Datasheet, PDF (65/85 Pages) Zilog, Inc. – Microprocessor Unit

DMA Byte Count Register Channel 1H
Mnemonic BCR1H: Address 2Fh
DMA Byte Count Register 0H
76 54 32 1 0
Z80180
Microprocessor Unit
59
Counting Data
Figure 57. DMA Byte Count Register 1H
DMA Memory Address Register Channel 1
(MAR1: I/O ADDRESS = 28h to 2Ah) specifies the physical memory address for channel 1
transfers, which may also be a destination or source memory address. The register contains
20 bits and may specify up to 1024-KB memory address.
DMA Memory Address Register, Channel 1L
Mnemonic MAR1L: Address 28h
DMA Memory Address Register, Channel 1L
76 54 32 1 0
—— —— — — — —
DMA Memory Address
Figure 58. DMA Memory Address Register, Channel 1L
PS014004-1106
Architecture