Z8018008VSG Datasheet, PDF (43/85 Pages) Zilog, Inc. – Microprocessor Unit

Z80180
Microprocessor Unit
37
CSIO Receive/Transmit Timing
CSIO CLock
Transmit data
(Internal Clock)
Transmit data
(External Clock)
Receive data
(Internal Clock)
Receive data
(External Clock)
56
56
57
11t_cyc
58 59
57
11t_cyc
58 59
11.5t_cyc ^16.5tcyc
60
61
11.5t_cyc 16.5t_cyc
60
61
Figure 25. CSIO Receive/Transmit Timing
Rise Time and Fall Times
65
EXTAL V_IL1 ^VIH1
66
V_{IH1 VIL1}
70
69
Input Rise
Time and
Figure 26. Rise Time and Fall Times
Exter-
nal
ASCI Register Description
The following sections explain the various functions of the ASCI
registers.
Figure 27 displays the ASCI block diagram.
PS014004-1106
Architecture