Z8018008VSG Datasheet, PDF (36/85 Pages) Zilog, Inc. – Microprocessor Unit

Z80180
Microprocessor Unit
30
Table 9. Z80180-10 AC Characteristics (continued)
No Symbol Item
58 t_SRSI CSIO Receive Data Set-up Time (Internal Clock
Operation)
59 t_SRHI CSIO Receive Data Hold Time (Internal Clock
Operation)
60 t_SRSE CSIO Receive Data Set-up Time (External Clock
Operation)
61 t_SRHE CSIO Receive Data Hold Time (External Clock
Operation)
62 t_RES
63 t_REH
64 t_OSC
65 t_EXr
66 t_EXf
67 t_Rr
68 t_Rf
69 t_Ir
70 t_If
RESET Set-up Time to Ø Fall
RESET Hold Time from Ø Fall
Oscillator Stabilization Time
External Clock Rise Time (EXTAL)
External Clock Fall Time (EXTAL)
RESET Rise Time
RESET Fall Time
Input Rise Time (except EXTAL, RESET)
Input Fall Time (except EXTAL, RESET)
Z80180-10
Min Max Unit
1
–
tcyc
1
–
tcyc
1
–
tcyc
1
–
tcyc
80 –
ns
50 –
ns
–
TBD ns
–
25 ns
–
25 ns
–
50 ns
–
50 ns
–
100 ns
–
100 ns
Timing Diagrams
Z80180 Timing signals are displayed in Figure 16 through Figure 27.
PS014004-1106
Architecture