Z8F082ASJ020EG Datasheet, PDF (61/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
44
GPIO Interrupts
Many of the GPIO port pins can be used as interrupt sources. Some port pins can be con-
figured to generate an interrupt request on either the rising edge or falling edge of the pin
input signal. Other port pin interrupt sources generate an interrupt when any edge occurs
(both rising and falling). See the GPIO Mode Interrupt Controller chapter on page 55 for
more information about interrupts using the GPIO pins.
GPIO Control Register Definitions
Four registers for each port provide access to GPIO control, input data and output data.
Table 17 lists these port registers. Use the Port A–D Address and Control registers
together to provide access to subregisters for port configuration and control.
Table 17. GPIO Port Registers and Subregisters
Port Register Mnemonic
PxADDR
PxCTL
PxIN
PxOUT
Port Subregister Mnemonic
PxDD
PxAF
PxOC
PxHDE
PxSMRE
PxPUE
PxAFS1
PxAFS2
Port Register Name
Port A–D Address Register; selects subregisters.
Port A–D Control Register; provides access to subregisters.
Port A–D Input Data Register.
Port A–D Output Data Register.
Port Register Name
Data Direction.
Alternate Function.
Output Control (Open-Drain).
High Drive Enable.
Stop Mode Recovery Source Enable.
Pull-up Enable.
Alternate Function Set 1.
Alternate Function Set 2.
PS022827-1212
PRELIMINARY
GPIO Interrupts