Z8F082ASJ020EG Datasheet, PDF (204/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
187
Table 109. Debug Command Enable/Disable (Continued)
Debug Command
Write Program Counter
Read Program Counter
Write Register
Command
Byte
06H
07H
08H
Read Register
Write Program Memory
Read Program Memory
Write Data Memory
Read Data Memory
Read Program Memory CRC
Reserved
Step Instruction
Stuff Instruction
Execute Instruction
Reserved
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H–FFH
Enabled when
Not in DEBUG
Mode?
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Disabled by Flash Read Protect
Option Bit
Disabled.
Disabled.
Only writes of the Flash Memory Control
registers are allowed. Additionally, only
the Mass Erase command is allowed to
be written to the Flash Control Register.
Disabled.
Disabled.
Disabled.
Yes.
–
–
–
Disabled.
Disabled.
Disabled.
–
In the list of OCD commands that follows, data and commands sent from the host to the
On-Chip Debugger are identified by DBG ← Command/Data. Data sent from the On-
Chip Debugger back to the host is identified by DBG → Data.
Read OCD Revision (00H). The Read OCD Revision command determines the version of
the On-Chip Debugger. If OCD commands are added, removed, or changed, this revision
number changes.
DBG ← 00H
DBG → OCDRev[15:8] (Major revision number)
DBG → OCDRev[7:0] (Minor revision number)
Read OCD Status Register (02H). The Read OCD Status Register command reads the
OCDSTAT Register.
DBG ← 02H
DBG → OCDSTAT[7:0]
Read Runtime Counter (03H). The Runtime Counter counts system clock cycles in
between Breakpoints. The 16-bit Runtime Counter counts up from 0000H and stops at the
maximum count of FFFFH. The Runtime Counter is overwritten during the Write Memory,
PS022827-1212
PRELIMINARY
On-Chip Debugger Commands