Z8F082ASJ020EG Datasheet, PDF (154/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
137
Table 75. ADC Data High Byte Register (ADCD_H)
Bit
7
6
5
4
3
2
1
0
Field
ADCDH
RESET
X
X
X
X
X
X
X
X
R/W
R
R
R
R
R
R
R
R
Address
F72H
X = Undefined.
Bit
[7:0]
ADCDH
Description
ADC Data High Byte
This byte contains the upper eight bits of the ADC output. These bits are not valid during a sin-
gle-shot conversion. During a continuous conversion, the most recent conversion output is
held in this register. These bits are undefined after a Reset.
ADC Data Low Byte Register
The ADC Data Low Byte (ADCD_L) Register contains the lower bits of the ADC output
plus an overflow status bit. The output is a 13-bit two’s complement value. During a sin-
gle-shot conversion, this value is invalid. Access to the ADC Data Low Byte Register is
read-only. Reading the ADC Data High Byte Register latches data in the ADC Low Bits
Register.
Table 76. ADC Data Low Byte Register (ADCD_L)
Bit
7
Field
RESET
X
R/W
R
Address
X = Undefined.
6
5
4
3
ADCDL
X
X
X
X
R
R
R
R
F73H
2
1
Reserved
X
X
R
R
0
OVF
X
R
Bit
[7:3]
ADCDL
Description
ADC Data Low Bits
These bits are the least significant five bits of the 13-bits of the ADC output. These bits are
undefined after a Reset.
PS022827-1212
PRELIMINARY
ADC Control Register Definitions