Z8F082ASJ020EG Datasheet, PDF (29/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
12
Table 2. Signal Descriptions (Continued)
Signal Mnemonic I/O Description
Reset
RESET
I/O RESET. Generates a Reset when asserted (driven Low). Also serves as a
reset indicator; the Z8 Encore! XP forces this pin low when in reset. This
pin is open-drain and features an enabled internal pull-up resistor.
Power Supply
V_DD
I Digital Power Supply.
AV_DD
I Analog Power Supply.
V_SS
I Digital Ground.
AV_SS
I Analog Ground.
Notes:
1. PB6 and PB7 are only available in 28-pin packages without ADC. In 28-pin packages with ADC, they are
replaced by AV_DD and AV_SS.
2. The AV_DD and AV_SS signals are available only in 28-pin packages with ADC. They are replaced by PB6 and PB7
on 28-pin packages without ADC.
Pin Characteristics
Table 3 describes the characteristics for each pin available on the Z8 Encore! XP F082A
Series 20- and 28-pin devices. Data in Table 3 is sorted alphabetically by the pin symbol
mnemonic.
Table 4 on page 14 provides detailed information about the characteristics for each pin
available on the Z8 Encore! XP F082A Series 8-pin devices.
Note:
All six I/O pins on the 8-pin packages are 5 V-tolerant (unless the pull-up devices are
enabled). The column in Table 3 below describes 5 V-tolerance for the 20- and 28-pin
packages only.
PS022827-1212
PRELIMINARY
Pin Characteristics