Z8F082ASJ020EG Datasheet, PDF (237/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
220
Table 128. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
Symbolic Operation
Address
Mode
dst src
Opcode(s)
Flags
Fetch Instr.
Cycle Cycle
(Hex) C Z S V D H s
s
SUB dst, src dst  dst – src
r
r
22
****1* 2
3
r
Ir
23
2
4
R
R
24
3
3
R IR
25
3
4
R IM
26
3
3
IR IM
27
3
4
SUBX dst, src dst  dst – src
ER ER
28
****1* 4
3
ER IM
29
4
3
SWAP dst
dst[7:4]  dst[3:0]
R
F0
X* *X–– 2
2
IR
F1
2
3
TCM dst, src (NOT dst) AND src
r
r
62
–* *0–– 2
3
r
Ir
63
2
4
R
R
64
3
3
R IR
65
3
4
R IM
66
3
3
IR IM
67
3
4
TCMX dst, src (NOT dst) AND src
ER ER
68
–* *0–– 4
3
ER IM
69
4
3
TM dst, src
dst AND src
r
r
72
–* *0–– 2
3
r
Ir
73
2
4
R
R
74
3
3
R IR
75
3
4
R IM
76
3
3
IR IM
77
3
4
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
PS022827-1212
PRELIMINARY
eZ8 CPU Instruction Summary