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Z8F082ASJ020EG Datasheet, PDF (28/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers
Z8 Encore! XP® F082A Series
Product Specification
11
Table 2. Signal Descriptions (Continued)
Signal Mnemonic I/O Description
Analog
ANA[7:0]
VREF
I Analog Port. These signals are used as inputs to the analog-to-digital con-
verter (ADC).
I/O Analog-to-digital converter reference voltage input, or buffered output for
internal reference.
Low-Power Operational Amplifier (LPO)
AMPINP/AMPINN
I LPO inputs. If enabled, these pins drive the positive and negative amplifier
inputs respectively.
AMPOUT
O LPO output. If enabled, this pin is driven by the on-chip LPO.
Oscillators
XIN
XOUT
I External Crystal Input. This is the input pin to the crystal oscillator. A crystal
can be connected between it and the XOUT pin to form the oscillator. In
addition, this pin is used with external RC networks or external clock driv-
ers to provide the system clock.
O External Crystal Output. This pin is the output of the crystal oscillator. A
crystal can be connected between it and the XIN pin to form the oscillator.
Clock Input
CLKIN
I Clock Input Signal. This pin may be used to input a TTL-level signal to be
used as the system clock.
LED Drivers
LED
O Direct LED drive capability. All port C pins have the capability to drive an
LED without any other external components. These pins have programma-
ble drive strengths set by the GPIO block.
On-Chip Debugger
DBG
I/O
Debug. This signal is the control and data input and output to and from the
On-Chip Debugger.
Caution: The DBG pin is open-drain and requires a pull-up resistor to
ensure proper operation.
Notes:
1. PB6 and PB7 are only available in 28-pin packages without ADC. In 28-pin packages with ADC, they are
replaced by AVDD and AVSS.
2. The AVDD and AVSS signals are available only in 28-pin packages with ADC. They are replaced by PB6 and PB7
on 28-pin packages without ADC.
PS022827-1212
PRELIMINARY
Signal Descriptions