Z8F082ASJ020EG Datasheet, PDF (213/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
196
the Watchdog Timer failure can be detected. A very slow system clock results in very slow
detection times.
Caution: It is possible to disable the clock failure detection circuitry and all functioning clock
sources. In this case, the Z8 Encore! XP F082A Series device ceases functioning and can
only be recovered by Power-On-Reset.
Oscillator Control Register Definitions
The Oscillator Control Register (OSCCTL) enables/disables the various oscillator circuits,
enables/disables the failure detection/recovery circuitry and selects the primary oscillator,
which becomes the system clock.
The Oscillator Control Register must be unlocked before writing. Unlock the Oscillator
Control Register by writing the two-step sequence E7H followed by 18H. The register is
locked at successful completion of a register write to the OSCCTL.
Table 113. Oscillator Control Register (OSCCTL)
Bit
7
6
5
4
3
2
1
0
Field
INTEN XTLEN WDTEN SOFEN WDFEN
SCKSEL
RESET
1
0
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F86H
Bit
[7]
INTEN
[6]
XTLEN
[5]
WDTEN
[4]
SOFEN
Description
Internal Precision Oscillator Enable
1 = Internal precision oscillator is enabled.
0 = Internal precision oscillator is disabled.
Crystal Oscillator Enable; this setting overrides the GPIO register control for PA0 and
PA1
1 = Crystal oscillator is enabled.
0 = Crystal oscillator is disabled.
Watchdog Timer Oscillator Enable
1 = Watchdog Timer oscillator is enabled.
0 = Watchdog Timer oscillator is disabled.
System Clock Oscillator Failure Detection Enable
1 = Failure detection and recovery of system clock oscillator is enabled.
0 = Failure detection and recovery of system clock oscillator is disabled.
PS022827-1212
P R E L I M I N A R Y Oscillator Control Register Definitions