Z8F082ASJ020EG Datasheet, PDF (21/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
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CPU and Peripheral Overview
The eZ8 CPU, Zilog’s latest 8-bit Central Processing Unit (CPU), meets the continuing
demand for faster and more code-efficient microcontrollers. The eZ8 CPU executes a
superset of the original Z8 instruction set. The features of eZ8 CPU include:
• Direct register-to-register architecture allows each register to function as an
accumulator, improving execution time and decreasing the required program
memory
• Software stack allows much greater depth in subroutine calls and interrupts than
hardware stacks
• Compatible with existing Z8 code
• Expanded internal Register File allows access of up to 4 KB
• New instructions improve execution efficiency for code developed using higher-
level programming languages, including C
• Pipelined instruction fetch and execution
• New instructions for improved performance including BIT, BSWAP, BTJ, CPC,
LDC, LDCI, LEA, MULT and SRL
• New instructions support 12-bit linear addressing of the Register File
• Up to 10 MIPS operation
• C-Compiler friendly
• 2 to 9 clock cycles per instruction
For more information about eZ8 CPU, refer to the eZ8 CPU Core User Manual
(UM0128), which is available for download on www.zilog.com.
10-Bit Analog-to-Digital Converter
The optional analog-to-digital converter (ADC) converts an analog input signal to a 10-bit
binary number. The ADC accepts inputs from eight different analog input pins in both sin-
gle-ended and differential modes. The ADC also features a unity gain buffer when high
input impedance is required.
Low-Power Operational Amplifier
The optional low-power operational amplifier (LPO) is a general-purpose amplifier pri-
marily targeted for current sense applications. The LPO output may be routed internally to
the ADC or externally to a pin.
PS022827-1212
PRELIMINARY
CPU and Peripheral Overview