Z89135 Datasheet, PDF (57/66 Pages) Zilog, Inc. – Low-Cost DTAD Controller

Zilog
Z8 CONTROL REGISTERS
D7 D6 D5 D4 D3 D2 D1 D0
RESERVED
Figure 64. Reserved
(F0H)
R241 TMR
D7 D6 D5 D4 D3 D2 D1 D0
0 No Function
1 Load T0
0 Disable T0 Count
1 Enable T0 Count
0 No Function
1 Load T1
0 Disable T1 Count
1 Enable T1 Count
TIN Modes
00 External Clock Input
01 Gate Input
10 Trigger Input
(Non-retriggerable)
11 Trigger Input
(Retriggerable)
TOUT Modes
00 Not Used
01 T0 Out
10 T1 Out
11 Internal Clock Out (P36)
Z89135/136 (ROMless)
Low-Cost DTAD Controller
R243 PRE1
1
D7 D6 D5 D4 D3 D2 D1 D0
Count Mode
0 T1 Single Pass
1 T1 Modulo N
Clock Source
1 T1Internal
0 T1External Timing Input
(TIN) Mode
Prescaler Modulo
(Range: 1-64 Decimal
01-00 HEX)
Figure 67. Prescaler 1 Register
(F3H: Write Only)
R244 T0
D7 D6 D5 D4 D3 D2 D1 D0
T0 Low Byte Initial Value
(When Written)
T0 Low Byte Current Value
(When Read)
Figure 68. Counter/Timer 0 Register
(F4H: Read/Write)
Figure 65. Timer Mode Register
(F1H: Read/Write)
R245 PRE0
D7 D6 D5 D4 D3 D2 D1 D0
R242 T1
D7 D6 D5 D4 D3 D2 D1 D0
T1 Low Byte Initial Value
(When Written)
T1 Low Byte Current Value
(When Read)
Figure 66. Counter/Timer 1 Register
(F2H: Read/Write)
Count Mode
0 T0 Single Pass
1 T0 Modulo N
Reserved
Prescaler Modulo
(Range: 1-64 Decimal
01-00 HEX)
Figure 69. Prescaler 0 Register
(F5H: Write Only)
DS97TAD0300
PRELIMINARY
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