Z89135 Datasheet, PDF (49/66 Pages) Zilog, Inc. – Low-Cost DTAD Controller

Zilog
Z89135/136 (ROMless)
Low-Cost DTAD Controller
ANALOG CONTROL REGISTER (ACR)
The Analog Control register is mapped to register EXT6 of The 16-bit field of EXT6 defines modes of both the A/D and
1 ^{the DSP (Table 15). This read/write register is accessible the D/A. The High Byte configures the D/A, while the Low}
by the DSP only.
Byte controls the A/D mode.
Field
MPX_DSP_INT0
Reserved
D/A_SamplingRate
DSP_port
Enable A/D
ConversionDone
StartConversion
A/D_SamplingRate
Table 15. EXT6 Analog Control Register (ACR)
Position
f---------------
-edcb-----------
-----a98--------
Attrib
R/W
R
W
R/W
--------76------
R/W
Value
1
0
11x
101
100
010
011
001
000
----------5-----
R/W
1
0
-----------4----
W
R
1
0
------------3---
R/W
1
0
-------------210
R/W
11x
101
100
010
011
001
000
Label
P26
Timer3
Return “0”
No Effect
Reserved
Reserved
64 kHz
16 kHz
10 kHz
4 kHz
Reserved
User defined DSP
Outputs
A/D Enabled
A/D Disabled
No effect
Done
Not Done
Start
Wait Timer
Reserved
Reserved
128 kHz
64 kHz
32 kHz
16 kHz
8 kHz
DS97TAD0300
PRELIMINARY
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