Z89135 Datasheet, PDF (20/66 Pages) Zilog, Inc. – Low-Cost DTAD Controller

Z89135/136 (ROMless)
Low-Cost DTAD Controller
PIN FUCTIONS
/RESET. (input/output, active Low). This pin initializes the
MCU. Reset is accomplished either through Power-On Re-
set (POR), Watch-Dog Timer reset, Stop-Mode Recovery,
or external reset. During POR and WDT Reset, the inter-
nally generated reset is driving the reset pin Low for the
POR time. Any devices driving the reset line must be open
drain to avoid damage from a possible conflict during reset
conditions. A /RESET will reset both the Z8 and the DSP.
For the Z8:
After the POR time, /RESET is a Schmitt-triggered input.
To avoid asynchronous and noisy reset problems, the Z8
is equipped with a reset filter of four external clocks
(4TpC). If the external reset signal is less than 4TpC in du-
ration, no reset occurs. On the fifth clock after the reset is
detected, an internal RST signal is latched and held for an
internal register count of 18 external clocks, or for the du-
ration of the external reset, whichever is longer. Program
execution begins at location 000CH (Hexadecimal), 5-10
TpC cycles after the /RESET is released. The Z8 does not
reset WDT, SMR, P2M, and P3M registers on a Stop-
Mode Recovery operation.
For the DSP:
A low level on the /RESET pin generates an internal reset
signal. The /RESET signal must be kept low for at least
one clock cycle. The CPU will fetch a new Program
Counter (PC) value from program memory address
0FFCH after the reset signal is released.
RMLS. ROMless (input, active High). This pin, when con-
nected to VDD, disables the internal Z8 ROM. (Note that,
when pulled Low to GND that part functions normally as
the ROM version). The DSP can not be configured as
ROMless. This pin is only available on the Z89135.
R//W. Read/Write (output, write Low). The R//W signal de-
fines the signal flow when the Z8 is reading or writing to ex-
ternal program or data memory. The Z8 is reading when
this pin is High and writing when this pin is Low.
/AS. Address Strobe (output, active Low). Address Strobe
is pulsed once at the beginning of each machine cycle. Ad-
dress output is through Port 0/Port 1 for all external pro-
grams. Memory address transfers are valid at the trailing
edge of /AS. Under program control, /AS is placed in the
high-impedance state along with Ports 0 and 1, Data
Strobe, and Read/Write.
/DS. Data Strobe (output, active Low). Data Strobe is acti-
vated once for each external memory transfer. For read
operations, data must be available prior to the trailing edge
of /DS. For write operations, the falling edge of /DS indi-
cates that output data is valid.
Zilog
XTAL1. Crystal 1 (time-based input). This pin connects a
parallel-resonant crystal, ceramic resonator, LC, RC net-
work or an external single-phase clock to the on-chip oscil-
lator input.
XTAL2. Crystal 2 (time-based output). This pin connects a
parallel-resonant, crystal, ceramic resonant, or LC network
to the on-chip oscillator output.
DSP0. (output). DSP0 is a general-purpose output pin
connected to bit 6 of the Analog Control Register (DSP
EXT4). This bit has no special significance and may be
used to output data by writing to bit 6 of the ACR.
DSP1. (output). DSP1 is a general-purpose output pin
connected to bit 7 of the Analog Control Register (DSP
EXT4). This bit has no special significance and may be
used to output data by writing to bit 7 of the ACR.
SCLK. System Clock (output). SCLK outputs the system
clock. This pin is available on the Z89136.
/SYNC. Synchronize (output). This signal indicates the last
clock cycle of the current executing Z8 instruction. This pin
is only available on the Z89136.
PWM. Pulse Width Modulator (output). The PWM is a 10-
bit resolution D/A converter. This output is a digital signal
with CMOS output levels.
AN_IN. (input). Analog input for the A/D converter.
ANV_DD. Analog power supply for the A/D converter.
AN_GND. Analog ground for the A/D converter.
V_REF+. (input). Reference voltage (High) for the A/D con-
verter.
V_REF. (input). Reference voltage (Low) for the A/D convert-
er.
V_DD. Digital power supply for the Z89135.
GND. Digital ground for the Z89135.
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PRELIMINARY
DS97TAD0300