Z89135 Datasheet, PDF (22/66 Pages) Zilog, Inc. – Low-Cost DTAD Controller

Z89135/136 (ROMless)
Low-Cost DTAD Controller
PIN FUCTIONS (Continued)
Port 1. (P17-P10). Port 1 is an 8-bit, bidirectional, CMOS-
compatible port (Figure11). It has multiplexed Address
(A7-A0) and Data (D7-D0) ports. These eight I/O lines are
programmed as inputs or outputs, or can be configured un-
der software control as an Address/Data port for interfac-
ing external memory. The input buffers are Schmitt trig-
gered and the output drivers are push-pull.
Port 1 may be placed under handshake control. In this con-
figuration, Port 3, lines P33 and P34 are used as the hand-
shake controls RDY1 and /DAV1 (Ready and Data Avail-
able). Memory locations greater than 24575 (in ROM
Zilog
mode) are referenced through Port 1. To interface external
memory, Port 1 must be programmed for the multiplexed
Address/Data mode. If more than 256 external locations
are required, Port 0 outputs the additional lines.
Port 1 can be placed in the high-impedance state along
with Port 0, /AS, /DS and R//W, allowing the Z89135/136
to share common resources in multiprocessor and DMA
applications.
8
Z89135/136
MCU
Port 1
(I/O or AD7 - AD0)
Handshake Controls
/DAV2 and RDY2
(P31 and P36)
OEN
Out
1.5
2.3V Hysteresis
In
R = 500 KΩ
Figure 11. Port 1 Configuration
1-22
PRELIMINARY
PAD
Auto Latch
DS97TAD0300