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DS567 Datasheet, PDF (9/24 Pages) Xilinx, Inc – This data sheet describes the DDR2 Memory Controller
DDR2 Memory Controller for PowerPC 440 Processors
Connecting to Memory
DDR2 SDRAM accesses can be halfword (two bytes), word (four bytes), or doubleword (eight bytes),
depending on the user configuration. Data to and from the MCI to the PPC440MC DDR2 Memory
Controller is organized as big-Endian (D[0:63], D0 is the MSB). The PPC440MC DDR2 Memory
Controller is organized as little-Endian (D[63:0], D63 is the MSB). Table 5 shows the interconnection
from the MCI to the PPC440MC DDR2 Memory Controller and from the PPC440MC DDR2 Memory
Controller to the DDR2 memory.
Table 5: MCI to PPC440MC DDR2 to DDR2 Signal Connections
Description MCI to PPC440MC DDR2 Signal [MSB:LSB]
PPC440MC DDR2 to DDR2 Signal
[MSB:LSB]
Data Bus
MIMCWRITEDATA[0:(C_DDR_DWIDTH * 2) – 1]
MCMIREADDATA[0:(C_DDR_DWIDTH * 2) – 1]
DDR2_DQ[C_DDR_DWIDTH – 1:0]
Address Bus MIMCADDRESS[0:35]
DDR2_A[C_DDR_AWIDTH – 1:0]
Bank
Address
Memory Controller Generated
DDR2_BA[C_DDR_BAWIDTH – 1:0]
Data Strobe Memory Controller Generated
DDR2_DQS[(C_DDR_DWIDTH
/C_DDR_DQS_WIDTH) – 1:0]
Data Mask MIMCBYTEENABLE[0:(C_MIBDATA_WIDTH/8) – 1] DDR2_DM[(C_DDR_DWIDTH
/C_DDR_DM_WIDTH) – 1:0]
Address Mapping
Table 6 shows the address mapping from the MCI interface. The address on the MCI interface maps to
a continuous address space at the memory. The memory address mapping is determined by the data
width of the memory, since each column address maps a location in memory for the width of each data
beat.
Table 6: Physical Controller Address Mapping
Memory Use
Physical Controller Address
Address Offset log2(C_DDR_DWIDTH/8)
Column Address MIMCADDRESS [(C_DDR_CAWIDTH + Address Offset – 1) : Address Offset]
Row Address
MIMCADDRESS [(C_DDR_RAWIDTH + C_DDR_CAWIDTH + Address Offset – 1) :
(C_DDR_CAWIDTH + Address Offset)]
Bank Address
MIMCADDRESS [(C_DDR_BAWIDTH + C_DDR_RAWIDTH + C_DDR_CAWIDTH +
Address Offset – 1) : (C_DDR_RAWIDTH + C_DDR_CAWIDTH + Address Offset)]
DS567 (v1.1.1) March 31, 2008
www.xilinx.com
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