DS541 Datasheet, PDF (25/27 Pages) Xilinx, Inc – Defense Grade Platform Flash In-System Programmable Configuration PROM

—PRODUCT OBSOLETE / UNDER OBSOLESCENCE—
Defense Grade Platform Flash In-System Programmable Configuration PROM
Table 16: XQF32P Pin Names and Descriptions (VOG48) (Cont’d)
Pin Name
Boundary
Scan Order
Boundary
Scan
Function
Pin Description
GND
Ground
DNC
Do Not Connect. (These pins must be left unconnected.)
XQF32P VOG48 Pinout Diagram
X-Ref Target - Figure 10
DNC
1
GND
2
DNC
3
VCCINT
4
BUSY
5
CF
6
GND
7
VCCO
8
CLKOUT
9
CEO
10
OE/RESET
11
CLK
12
CE
13
DNC
14
VCCINT
15
DNC
16
GND
17
DNC
18
TDI
19
TCK
20
TMS
21
TDO
22
GND
23
VCCJ
24
48
47
46
45
44
43
42
41
40
39
VOG48
38
Top
37
36
View
35
34
33
32
31
30
29
28
27
26
25
Figure 10: VOG48 Pinout Diagram (Top View) with Pin Names
48-pin
TSOP
VOG48
2, 7, 17,
23, 31, 36,
46
1, 3, 14,
16, 18, 35,
37, 39, 40,
41, 42
D7
D6
GND
VCCO
D5
D4
DNC
DNC
DNC
DNC
VCCO
DNC
GND
DNC
VCCINT
D3
D2
GND
VCCO
D1
D0
REV_SEL1
REV_SEL0
EN_EXT_SEL
ds541_10_012611
DS541 (v3.0) August 5, 2015
Product Specification
www.xilinx.com
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