DS541 Datasheet, PDF (18/27 Pages) Xilinx, Inc – Defense Grade Platform Flash In-System Programmable Configuration PROM

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Defense Grade Platform Flash In-System Programmable Configuration PROM
Table 13: XQF32P PROM as Configuration Master with CLK Input Pin as Clock Source (Cont’d)
Symbol
Description
T_LC
T_HC
T_HCE
T_HOE
T_SB
T_HB
T_CLKO
T_CECC
CLK Low time⁽³⁾ when V_CCO = 3.3V or 2.5V
CLK Low time⁽³⁾ when V_CCO = 1.8V
CLK High time⁽³⁾ when V_CCO = 3.3V or 2.5V
CLK High time⁽³⁾ when V_CCO = 1.8V
CE hold time (guarantees counters are reset)⁽⁵⁾ when V_CCO = 3.3V or 2.5V
CE hold time (guarantees counters are reset)⁽⁵⁾ when V_CCO = 1.8V
OE/RESET hold time (guarantees counters are reset)⁽⁶⁾ when V_CCO = 3.3V or 2.5V
OE/RESET hold time (guarantees counters are reset)⁽⁶⁾ when V_CCO = 1.8V
BUSY setup time to CLKOUT when V_CCO = 3.3V or 2.5V
BUSY setup time to CLKOUT when V_CCO = 1.8V
BUSY hold time to CLKOUT when V_CCO = 3.3V or 2.5V
BUSY hold time to CLKOUT when V_CCO = 1.8V
CLK input to CLKOUT output delay when V_CCO = 3.3V or 2.5V
CLK input to CLKOUT output delay when V_CCO = 1.8V
CLK input to CLKOUT output delay when V_CCO = 3.3V or 2.5V
with decompression⁽¹⁰⁾
CLK input to CLKOUT output delay when V_CCO = 1.8V with decompression⁽¹⁰⁾
CE to CLKOUT delay⁽⁸⁾ when V_CCO = 3.3V or 2.5V
CE to CLKOUT delay⁽⁸⁾ when V_CCO = 1.8V
XQF32P
Min
Max
12
–
12
–
12
–
12
–
2000
–
2000
–
2000
–
2000
–
12
–
12
–
8
–
8
–
–
35
–
35
–
35
–
35
0
2 CLK
cycles
0
2 CLK
cycles
T_{OECC OE/RESET to CLKOUT delay(8) when VCCO = 3.3V or 2.5V}
0
2 CLK
cycles
OE/RESET to CLKOUT delay⁽⁸⁾ when V_CCO = 1.8V
0
2 CLK
cycles
T_CFCC CF to CLKOUT delay⁽⁸⁾ when V_CCO = 3.3V or 2.5V
0
–
CF to CLKOUT delay⁽⁸⁾ when V_CCO = 1.8V
0
–
T_CCDD CLKOUT to data delay when V_CCO = 3.3V or 2.5V⁽⁹⁾
–
32
CLKOUT to data delay when V_CCO = 1.8V⁽⁹⁾
–
32
T_DDC Data setup time to CLKOUT when V_CCO = 3.3V or 2.5V with decompression ^(9)(10)
5
–
Data setup time to CLKOUT when V_CCO = 1.8V with decompression^(9)(10)
5
–
T_COH Data hold from CLKOUT when V_CCO = 3.3V or 2.5V
3
–
Data hold from CLKOUT when V_CCO = 1.8V
Data hold from CLKOUT when V_CCO = 3.3V or 2.5V with decompression⁽¹⁰⁾
Data hold from CLKOUT when V_CCO = 1.8V with decompression⁽¹⁰⁾
3
–
3
–
3
–
T_SXT EN_EXT_SEL setup time to CF, CE, or OE/RESET when V_CCO = 3.3V or 2.5V
300
–
EN_EXT_SEL setup time to CF, CE, or OE/RESET when V_CCO = 1.8V
300
–
T_HXT EN_EXT_SEL hold time from CF, CE, or OE/RESET when V_CCO = 3.3V or 2.5V
300
–
EN_EXT_SEL hold time from CF, CE, or OE/RESET when V_CCO = 1.8V
300
–
T_SRV REV_SEL setup time to CF, CE, or OE/RESET when V_CCO = 3.3V or 2.5V
300
–
REV_SEL setup time to CF, CE, or OE/RESET when V_CCO = 1.8V
300
–
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS541 (v3.0) August 5, 2015
Product Specification
www.xilinx.com
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