DS620 Datasheet, PDF (19/30 Pages) Dallas Semiconductor – Low-Voltage, +-0.5°C Accuracy Digital Thermometer and Thermostat

LogiCORE IP XPS SYSMON ADC (v3.00.b)
IP Interrupt Enable Register (IPIER)
The IPIER register has an enable bit for each defined bit of the IPISR register as shown in Figure 10 and described
in Table 12. All bits are cleared upon reset.
X-Ref Target - Figure 10
Undefined
JTAG
LOCKED EOS ALM[1] ^OT
0
23 24 25 26 27 28 29 30 31
JTAG EOC ALM[2] ALM[0]
MODIFIED
DS620_10_020509
Figure 10: IP Interrupt Enable Register (IPIER)
Table 12: IP Interrupt Enable Register (IPIER) Description (C_BASEADDR + 0x68)
Bit(s)
Name
Access Reset Value
Description
0 - 21
Undefined
N/A
N/A
Undefined.
22
ALM[0] Deactive
R/W
ALM[0] Deactive Interrupt
’0’
’0’ = Disabled
’1’ = Enabled
23
OT Deactive
R/W
OT Deactive Interrupt
’0’
’0’ = Disabled
’1’ = Enabled
24
JTAG
MODIFIED
R/W
JTAGMODIFIED Interrupt
’0’
’0’ = Disabled
’1’ = Enabled
25
JTAG
LOCKED
R/W
JTAGLOCKED Interrupt
’0’
’0’ = Disabled
’1’ = Enabled
End of Conversion signal Interrupt
26
EOC
R/W
’0’
’0’ = Disabled
’1’ = Enabled
End of Sequence Interrupt
27
EOS
R/W
’0’
’0’ = Disabled
’1’ = Enabled
System Monitor V_CCAUX-sensor Interrupt
28
ALM[2]
R/W
’0’
’0’ = Disabled
’1’ = Enabled
System Monitor V_CCINT-sensor Interrupt
29
ALM[1]
R/W
’0’
’0’ = Disabled
’1’ = Enabled
System Monitor temperature-sensor Interrupt
30
ALM[0]
R/W
’0’
’0’ = Disabled
’1’ = Enabled
Over-Temperature alarm Interrupt
31
OT
R/W
’0’
’0’ = Disabled
’1’ = Enabled
DS620 October 19, 2011
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19
Product Specification