W83627EHF Datasheet, PDF (74/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
Bit 5: AUXFANIN0 output value if bit 4 sets to 0. Write 1, pin111(AUXFANIN0) always generates a
logic high signal. Write 0, pin111 always generates a logic low signal. This bit is default 0.
Bit 4: AUXFANIN0 Input Control. Set to 1, pin111(AUXFANIN) acts as FAN tachometer input, which is
default value. Set to 0, this pin111 acts as FAN control signal and the output value of FAN
control is set by this register bit 5.
Bit 3: CPUFANIN0 output value if bit 2 sets to 0. Write 1, pin112(CPUFANIN0) always generates a
logic high signal. Write 0, pin112 always generates a logic low signal. This bit is default 0.
Bit 2: CPUFANIN0 Input Control. Set to 1, pin112(CPUFANIN0) acts as FAN tachometer input, which
is default value. Set to 0, this pin112 acts as FAN control signal and the output value of FAN
control is set by this register bit 3.
Bit 1: SYSFANIN output value if bit 0 sets to 0. Write 1, pin113(SYSFANIN) always generates a logic
high signal. Write 0, pin113 always generates a logic low signal. This bit is default 0.
Bit 0: SYSFANIN Input Control. Set to 1, pin113(SYSFANIN) acts as FAN tachometer input, which is
default value. Set to 0, this pin113 acts as FAN control signal and the output value of FAN
control is set by this register bit 1.
6.8.46 Register 50h ~ 5Fh Bank Select Register - Index 4Eh (Bank 0)
Register Location:
4Eh
Power on Default Value:
80h
Attribute:
Read/Write
Size:
8 bits
7 65432 1 0
BANKSEL0
BANKSEL1
BANKSEL2
Reserved
EN_CPUFANIN1_BP
EN_AUXFANIN1_BP
Reserved
HBACS
Bit 7: HBACS - High byte access. Set to 1, access Index 4Fh high byte register.
Set to 0, access Index 4Fh low byte register. (default 1)
Bit 6: Reserved. This bit should be set to 0.
Bit 5: BEEP output control for AUXFANIN1 if the monitor value exceed the limit value. Write 1, enable
BEEP output. Write 0, disable BEEP output, which is default value.
Bit 4: BEEP output control for CPUFANIN1 if the monitor value exceed the limit value. Write 1, enable
BEEP output. Write 0, disable BEEP output, which is default value.
Bit 3: Reserved. This bit should be set to 0.
Bit 2-0: Index ports 0x50~0x5F Bank select.
Set to 0, select Bank0.
Set to 1, select Bank1.
Set to 2, select Bank2.
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