W83627EHF Datasheet, PDF (115/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
CR F7h. (Game Port PAD control register; Default 00h)
BIT READ / WRITE
DESCRIPTION
7~1 Reserved.
Joystick Power Down
0
R/W
0: Joystick Power Down Disable.
1: Joystick Power Down Enable.
7.9 Logical Device 8 (WDTO# & PLED)
CR 30h. (Default 00h)
BIT READ / WRITE
7~1 Reserved.
0
R/W
0: WDTO# is inactive.
DESCRIPTION
1: Activate WDTO#.
CR F5h. (WDTO#, PLED and KBC P20 control mode register; Default 00h)
BIT READ / WRITE
DESCRIPTION
7~6
R/W
5 Reserved.
Select Power LED mode.
00: Power LED pin is tri-stated.
01: Power LED pin is driven low.
10: Power LED pin outputs 1Hz pulse with 50% duty cycle.
11: Power LED pin outputs ¹/₄Hz pulse with 50% duty cycle.
Faster 1000 times for WDTO# count mode.
0: Disable.
4
R/W
1: Enable.
(If bit-3 is Second Mode , the count mode be 1/1000 Sec.)
(If bit-3 is Minute Mode , the count mode be 1/1000 Min.)
Select WDTO# count mode.
3
R/W
0: Second Mode.
1: Minute Mode.
Enable the rising edge of KBC reset (P20) to issue time-out event.
2
R/W
0: Disable.
1: Enable.
Disable / Enable the WDTO# output low pulse to the KBRST# pin (PIN60)
1
R/W
0: Disable.
1: Enable.
0 Reserved.
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Publication Release Date: January 18, 2006
Revision 1.0