W83627EHF Datasheet, PDF (113/141 Pages) Winbond – evolving product from Winbonds most popular I/O family

W83627EHF/EF, W83627EHG/EG
CR 60h, 61h. (Default 02h, 01h)
BIT READ / WRITE
DESCRIPTION
7~0
R/W
These two registers select Game Port base address <100h : FFFh> on 1
byte boundary.
CR 62h, 63h. (Default 03h, 30h)
BIT READ / WRITE
DESCRIPTION
7~0
R/W
These two registers select MIDI Port base address <100h : FFEh> on 2
bytes boundary.
CR 70h. (Default 09h)
BIT READ / WRITE
DESCRIPTION
7~4 Reserved.
3~0
R/W
These bits select IRQ resource for MIDI Port.
CR F0h. (GPIO1 I/O register; Default FFh)
BIT READ / WRITE
DESCRIPTION
GPIO1 I/O register
7~0
R/W
0: The respective GPIO1 PIN is programmed as an Output port
1: The respective GPIO1 PIN is programmed as an Input port.
CR F1h. (GPIO1 Data register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO1 Data register
R/W
For Output ports, the respective bits can be read/written and produced to
7~0
pins.
Read Only
For Input ports, the respective bits can be read only from pins. Write
accesses will be ignored.
CR F2h. (GPIO1 Inversion register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO1 Inversion register
7~0
R/W
0: The respective bit and the port value are the same.
1: The respective bit and the port value are inverted. (Both Input & Output
ports)
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Publication Release Date: January 18, 2006
Revision 1.0